Experimental Comparison of 0402 Ceramic Capacitors as Supply Bypasses

In this short take from the "Stuff the Data Sheet Said Not to Do" department, a Cypress S27KS0641 self-refreshing DRAM IC has been mounted dead bug-style to a carrier PCB for the ZTex 2.13A FPGA board. The BGA package was connected to the FPGA board's 0.100" headers with hand-soldered 40 AWG enamelled wires and subsequently covered with epoxy. No attention whatever was paid to crosstalk, EMI, trace impedance and length matching, or any other topics in the HyperRAM layout guide. FCC officials were not contacted for comment.

The goal of the experiment was to build intuition for the behavior of a typical 1.8V CMOS logic IC with various supply bypass capacitance values. Waveform data was captured with a Tektronix P6248 1.7 GHz differential probe across the bypass capacitor under test. Ceramic capacitors of 0402 size were tested in values of 10 pF, 100 pF, 10 nF, 100 nF, and 1 uF. (The 1206 capacitor visible in the photo at right was removed from the circuit.)

To make the test even more "interesting," this particular part performs DDR transfers with single-ended pins. Among other frequencies generated and used by the FPGA and its associated USB chip, there is significant energy at 78 MHz, 48 MHz, and the doubled clock frequency of 96 MHz, along with its higher-order harmonics.

The screenshots below were taken during a typical register-read operation. The test ran successfully with all combinations of bypass capacitance -- and none at all -- in place.



1 uF

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100 nF

:



More or less indistinguishable from the 1 uF trace above.

10 nF

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The 10 nF cap is less effective in the 25-50 MHz range than the 100 nF and 1 uF parts above. Xr is less than one ohm at these frequencies, but the source impedance is probably in the same range.

100 pF

:



Good illustration of unwanted PDN resonant effects. The 100 pF capacitor cleans up some of the higher-frequency content seen in the "None of the above" plot below, but in combination with other circuit elements it ends up increasing the level of the 96 MHz clock. The self-inductance of #40 wire in free space is about 30 nH/inch, so the numbers are definitely in the right (wrong) range.

10 pF

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A similar effect occurs here, but at harmonics of the clock and/or other frequencies. The 10 pF capacitor is unhelpful at lower frequencies and counterproductive at higher ones.

None of the above

:




All of the above

:



Summary

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These results support the use of larger capacitance values as bypasses, located as close as possible to the load. All other things being equal, physically-smaller capacitors with higher values are more desirable as bypasses, assuming an eye is kept on their voltage coefficient.

The use of separate bypass capacitors with values in the pF range is unnecessary in the absence of specific reasons to the contrary. They should never be used by themselves at the point of load. When multiple bypass capacitors are used in a single stage, there's a good argument in favor of choosing the same value for all of them.



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